Port of Pascal Fpga-logarithmic-unit Simulator to Simulink/rtw
نویسنده
چکیده
Implementation of floating point algorithms in FPGA (Field Programmable Gate Arrays) creates an open problem. One of possible solutions is the representation of floating point numbers as an integer (fixed point) logarithm (32 bit) [1]. Basic arithmetical operations can be performed in the logarithm numbering system which is suitable for FPGA and ASIC implementation. Simulator of such system has been designed originally in Pascal. The Pascal simulator has been utilizing special 64-bit integer format of the Turbo-Pascal compiler.
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تاریخ انتشار 1999